What is AXI DMA?

The AXI DMA provides high-bandwidth direct memory access between memory and AXI4-Stream target peripherals. Its optional scatter/gather capabilities also offload data movement tasks from the Central Processing Unit (CPU).

What is AXI CDMA?

The AXI CDMA provides high-bandwidth Direct Memory Access (DMA) between a memory-mapped source address and a memory-mapped destination address using the AXI4 protocol. Initialization, status, and control registers are accessed through an AXI4-Lite slave interface, suitable for the Xilinx MicroBlaze™ processor.

What is CPM in PCIe?

The Versal ACAP devices include CCIX-PCIe Module (CPM). The integrated block for CPM PCIe A along with the integrated bridge can function as PCIe Root Port with up to x16 Gen4 link configuration. This page discusses the use of integrated PCIe controller with integrated bridge in CPM in root mode.

How do I use AXI DMA?

Add the AXI DMA

1. Open the base project in Vivado.
2. In the Flow Navigator, click “Open Block Design”.
3. The block diagram should open and you should only have the Zynq PS in the design.
4. Click the “Add IP” icon and double click “AXI Direct Memory Access” from the catalog.

How to instantiate AXI direct memory access on Zynq-7000?

The simplest way to instantiate AXI DMA on Zynq-7000 based boards is to take board vendor’s base design, strip unnecessary components, add AXI Direct Memory Access IP-core and connect the output stream port to it’s input stream port.

What does the AXI DMA IP core do?

The AXI Direct Memory Access (AXI DMA) IP core provides high-bandwidth direct memory access between the AXI4 memory mapped and AXI4-Stream IP interfaces. Its optional scatter gather capabilities also offload data movement tasks from the Central Processing Unit (CPU) in processor-based systems.

Which is AXI DMA core does Xilinx Vivado use?

The Xilinx® LogiCORE™ IP AXI Direct Memory Access (AXI DMA) core is a soft Xilinx IP core for use with the Xilinx Vivado® Design Suite. The AXI DMA provides high-bandwidth direct memory access between memory and AXI4-Stream target peripherals. Its optional scatter/gather capabilities also offload data movement tasks from the Central Processing

What does AXI direct memory access on Xilinx mean?

Getting started with direct memory access on Xilinx boards may be initially overwhelming. First of all Xilinx distinguishes AXI DMA and AXI VDMA in programmable fabric. AXI DMA refers to traditional FPGA direct memory access which roughly corresponds to transferring arbitrary streams of bytes from FPGA to a slice of DDR memory and vice versa.

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